Exemplary embodiments relate to a processor and an instruction processing method in the processor, and more particularly, to a processor configured to improve the processing ability of the processor and save power by allowing a plurality of instructions, which are frequently executed or processed in the processor, to be simultaneously processed in a core for a single cycle, and an instruction processing method in the processor.
As Background Art related with the present invention, there is Korean Patent Registration No. 1996-0015584 (Nov. 18, 1996).
A processor means hardware configured to perform an algorithm for a specific application by reading out instructions stored in a memory or an external memory such as a disk, performing specific calculation on an operand in accordance with the operation encoded in the instruction, and storing the result again.
The application of the processor reaches wide field throughout the entire field of the system semiconductor. The application of the processor is variously increasing to high-performance media data processing of large-capacity multimedia such as compressing and releasing of video data, compressing and releasing of audio data, deforming of audio data, and sound effect, a wire/wireless communication modem, a voice codec algorithm, network data processing, a touch screen, a home appliance controller, a minimum-performance microcontroller platform such as motor control, wireless sensor network, and devices that cannot be supplied with stable power or power from the outside such as an electronics dust.
The processor basically includes a core, a translation lookaside buffer (TLB), and a cache. The work to be performed by the processor is defined by a combination of a plurality of instructions. That is, when instructions are stored in a memory and sequentially input to the processor, the processor performs specific calculation for each clock cycle. The translation lookaside buffer functions to convert a virtual address into a physical address in order to drive an application based on the operation system and the cache functions to increase the speed of the processor by temporarily storing the instructions, which are stored in an external memory, in a chip.
A common cache means a high-speed storage unit configured to temporarily store information between a processor having a relatively high processing speed and an external memory having a relatively low processing speed. The cache can increase the processing speed of a computer, using locality of reference when executing a shared program. That is, it is possible to observe that only one or two sections of the external memory are intensively accessed for a predetermined time when observing the addresses in the external memory that the processor accesses while a computer program is executed, which is called locality of space. It is possible to reduce the time that takes the processor to access an external memory by storing some sections of the external memory, which are frequently used, in a high-speed cache between the external memory and the processor, by using the property.
In other words, it takes the core of the processor a considerable time of generally 10 to 100 cycles to read out data from an external memory, which causes the core to remain an idle state without working for a long time. The cache is a unit achieved by storing instructions that the core frequently uses in a memory in a chip directly connected to the core and functions to reduce the time for the core to access the external memory. The cache functions to temporarily store instructions in the chip instead of a large-capacity external memory.
The cache has a considerable influence on the performance of the processor, and when the core requests a specific instruction and the instruction required by the processor is not in the cache, the core has to read out the instruction from the external memory, so that the cache has to be operated to have the instructions, which may be requested by the processor, as many as possible.
However, since power is consumed every time the core reads out an instruction from the cache, the cache has a considerable influence on the power consumption of the processor. In the related art, there was a problem in that the amount of consumed power increases because power is consumed every time even instructions that are frequently processed are read out from the cache, and as the core sequentially reads out the instructions from the cache, there is a limit in the processing ability of the processor.